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What limits my voltage?

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Nookie..

Also - different CPU instuctions use different parts of the cpu and the faster you run the CPU the more instructions it will execute in a given time, resulting in more heat.

Data paths etc are also being used more often, so they don't have the chance to cool down.
 
Hello all,

I have a few notes on CPU power and voltage. There are three parts to power consumption in a CMOS logic circuit.
1) Switching Power
2) Short Circuit Power
3) Leakage Power

All CMOS logic gates have two paths for current to flow during this transition, 1) to the load capacitance(next gate/gates in design) 2) Strait to ground. The short circuit power is type 2, and the switching power is type 1. The leakage power is power disipated during the states where no transitions occur. This power is generally small, but can be big when considering 50Million gates.

___/^^^^^^^^^^^^\___________/^^^^^^^^^^^\______ -> Output Voltage Vs. Time
1&2 3 1&2 3 1&2 3 1&2 3 -> Power disipation Types

Switching power follows the charging and discharging of a capacitor at a given frequency. It follows this Eq: Pow=A*C*F*(V^2). The C is the effective capacitance of the gate, A is a scale factor that is the number of gates switching at frequncy F, and of course V is supply voltage. As you can see if frequency is doubled the power is doubled, as voltage is doubled power is quadroopled. This power is a the largest part of the power disipated in a logic circuit running when the rise and fall times of the input signals are <<the pulse width of the signal.

The short circuit power as I have said above is the "wasted current" that is lost because there exists current path from power to ground during this short time. This power is more dependant on the input voltage, ie how long it takes to get from low to high or high to low. This time is approximetely constant vs. frequency, because the rise and fall time of a gate does not change. Now how could you express power consumed by this? Well it will double when frequncy doubles, and it will increase when voltage increases. Pow ~F*V.

The Leakage power is basically the amount of power disipated while the gates are not in a state of switching. Basically even MOS transistor draws some current when it is turned off. So this current increases with the number of gates, and the voltage.

I hope this is helpfull,

shane
 
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