FEATURED Ivy Bridge Rumors

[grumperfish]

Or C2Q 65nm chip...

I meant regarding switching from SB to IB, but a switch from a Q6600 to socket 1155 would be pretty massive either way due to IPC increases, per-core performance, and across-the-board efficiency. That's what I did (with a quick stop at 1366), and relegated the quad to the backup PC. If I had switched now I'd be looking seriously at IB instead, although relative performance to the Q6600 is massive enough that either would be a significant change.

...Not that an overclocked Q6600 isn't more than powerful enough for most needs as it is.

 

[Audioaficionado]

An i7 IB laptop would be more powerful than my desktop. Even though my Q6600 is running @ 3GHz. A 6 core IB desktop would be fun too.

 

[mjw21a]

^^^ Yah, I agree.... You don't need it, but you want it

 

[Brolloks]

Sooo...what is it gonna be 23 or 27????

Maybe Hokie can point us to a number Is it a prime number Hokie?

 

[Janus67]

Yes, Hokie. How do you feel about:



Or do you prefer transformers that can be divided into other transformers?

 

[Bobnova]

In my experience all transformers are divisible if you drop them far enough.
Release dates that I can't share? Well.... I can't share.

 

[hokiealumnus]

In my experience all transformers are divisible if you drop them far enough.
Release dates that I can't share? Well.... I can't share.

I'm going to go with that answer.

 

[Audioaficionado]

Sooo...what is it gonna be 23 or 27????

Maybe Hokie can point us to a number Is it a prime number Hokie?

It's divisible by the prime number 1

 

[muddocktor]

One other thing I plan to investigate is how well IB compares to SB when using high speed ram too with all 4 ram slots filled. I ordered another 2 x 4GB kit of G. Skill DDR3-2133 Ripjaws X Turbulence ram to go with a kit I already have, so I can see how well both procs can deal with high speed ram. I know already that the SB chip I'm going to compare to could run that ram as a pair, and presently have 4 sticks of Ripjaws X DDR3-1600 in the system and running with no problems.

 

[Bobnova]

Also divisible by itself and other numbers.
Whether or not those numbers are integers is up to you to guess

 

[Janus67]

It's divisible by the prime number 1

*ahem* 1 isn't a prime number

 

[Archer0915]

*ahem* 1 isn't a prime number

Well it is not composite!

 

[MattNo5ss]

Yep, not prime or composite. 1 is in the "unit" class of numbers

 

[jason4207]

What i'm saying is that 3 gates use more power then 1 gate and the les leakage you get with 3 gates does not help when your using 3 times the amount of power in the 3 gates.

22nm is not the problem it's the TRI-Gates on every transistor billons of them.

I think you're jumping to conclusions.

It's not really 3 gates as far as I can tell from your pic. Looks like 1 gate with 3 planes. Kind of like a stranded wire vs a solid wire.

Currently it seems to be more leaky, not less.

I'm hoping the next major stepping will be like Q6600 B3 to G0. Better OCing on air, lower voltages, and much cooler. Just need to work out the kinks.

 

[Bima Sylirian]

I'm hoping the next major stepping will be like Q6600 B3 to G0. Better OCing on air, lower voltages, and much cooler. Just need to work out the kinks.

Similar to when Intel make a revision on 1st Gen Core i7 from stepping C0 to D0.
Intel should be able to it with Ivy Bridge (if they are willing).

Aside from overclocking & temperature, Ivy Bridge still do a good improvement in performance per clock and power consumption.
On the other hand, AMD should use this opportunity to strengthen their position in performance class. Especially in overclocking.

 

[wingman99]

I think you're jumping to conclusions.

It's not really 3 gates as far as I can tell from your pic. Looks like 1 gate with 3 planes. Kind of like a stranded wire vs a solid wire.

Currently it seems to be more leaky, not less.

I'm hoping the next major stepping will be like Q6600 B3 to G0. Better OCing on air, lower voltages, and much cooler. Just need to work out the kinks.

http://www.pcmag.com/article2/0,2817,2384909,00.asp
QUOTE:Tri-Gate explained. The Tri-Gate technology gets its name from the fact that transistors using it have conducting channels that are formed on all three sides—two on each side, one across the top—of a tall and narrow silicon fin that rises vertically from the silicon substrate. On a traditional two-dimensional, or "planar," transistor, the gate runs just across the top. But on the vertical fin, transistors can be packed closer together. This provides enough extra control to allow more transistor current to flow when the transistor is on, almost zero when it is off, and gives the transistor the ability to switch quickly between the two states.

Transistors leak power when there off.

So there is more current flow with the 3 gates when it's on and less leakage when it's off.

A simple revision is not going to change the new 3 gate properties, i think people are getting there hopes up like they did with bulldozer.

There are tradeoffs when making tri-gate transistor you get less leakage however you get 3 separate planes that use more power in one transistor.
A tri-gate transistor is not that amazing it's just 3 sided vertical gate transistor in one, intel came up with the idea in 2002

If they would have used a single vertical fin through the gate it would use less power.

When they went from 45nm to 32nm the power savings scaled just as much as IB 22nm, that's what i see.

AMD has the record in transistor cpu clock speed.

 

[mjw21a]

I don't really believe that AMD have the resources to try keep up in x86 performance. Their focus is on tying to create APU's which utilize the GPU component for compute tasks. That's playing to their strengths whithout having to compete directly with Intel.

 

[ozzlo]

There are tradeoffs when making tri-gate transistor you get less leakage however you get 3 separate planes that use more power in one transistor.
A tri-gate transistor is not that amazing it's just 3 sided vertical gate transistor in one, intel came up with the idea in 2002

If they would have used a single vertical fin through the gate it would use less power.

When they went from 45nm to 32nm the power savings scaled just as much as IB 22nm, that's what i see.

I thought increasing the surface area reduced the overall resistance thus reducing heat and power...
Adding additional conducting planes should work like parallel resistors where the Total resistance is usually less than the path with least resistance.

*EDIT*
Results in this thread seem to be sugguesting otherwise... looks like my arguement could be invalid.
http://www.overclockers.com/forums/showthread.php?t=704767


On the the subject of transformers...

It's divisible by the prime number 1

I see what you did there....

 

[muddocktor]

I've also seen a picture of a delidded IB out there that seems to show that Intel, in their infinite wisdom , has reverted back to using the old style TIM between the IHS and processor slug instead of the fluxless soldering process to bond the IHS to the core slug. If this is true for the retail processors, that would be why we are seeing such crappy temps being posted up so far. And again, if they have done so, it opens up a new cottage industry of delidding IB procs for ambient cooling overclocking. Of course that also opens up the can of worms called crushing the core and also getting the heatsink base down into the socket good enough for good core to base contact.

 

[EarthDog]

Transistor density has nothing to do with that? I mean they squeezed a shed load more into less space. THAT, I would imagine, would be the main factor to the high temps. Im sure, that a better interface between the core and the lid would help, but I dont think that is the source of the problem.